LLVM Weekly - #526, January 29th 2024
Welcome to the five hundred and twenty-sixth issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at http://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to asb@asbradbury.org, @llvmweekly or @asbradbury on Twitter, or @llvmweekly@fosstodon.org or @asb@fosstodon.org.
News and articles from around the web and events
The EuroLLVM 2024 event site is now live, along with ticket pricing details and precise dates for the event. Don’t forget the upcoming talk proposals deadline on Feb 4th and the student travel grant deadline on Feb 5th.
According to the LLVM calendar in the coming week there will be:
- Office hours with the following hosts: Johannes Doerfert.
- Online sync-ups on the following topics: Pointer authentication, Bay Area in-person meetup, Flang, RISC-V, embedded toolchains, HLSL, SPIR-V.
- For more details see the LLVM calendar, getting involved documentation on online sync ups and office hours.
On the forums
The LLVM 18.x branch has been created, though note that 18.1.0-rc1 is delayed due to some issues moving the release process to PRs.
Jeremy Morse provided an update on work to eliminate debug intrinsics, while Stephen Tozer noted a PR is now open for the changes to debuginfo’s textual IR representation
New ‘requirements’ were added for committing to the main branch. As later explained the intent is that an extra check box is needed when merging a PR from the web UI if any of the pre-commit checks are failing or nobody approved the patch. A warning message is also printed when pushing directly via git. As there was confusion about the change and whether it had received consensus.
Aiden Grossman started an RFC discussion on using GitHub Actions rather than Buildkite for precommit CI.
MLIR News #61 is now out, featuring some really detailed descriptions of some recent commits.
Andy Kaylor started a discussion about nofpclass attributes and whether they result in optimisations that are surprisingly aggressive to end users.
Bruno Cardoso Lopes initiated an RFC on upstreaming ClangIR, detailing the state of ClangIR today and changes made since it was previously discussed.
Fabian Mora shared benchmark results from adding types to MLIR’s proposed ptr dialect. This generated quite a bit of discussion.
Mingming Liu provided an update on dynamic type profiling and optimisation in LLVM, pointing to a downstream end-to-end implementation and an initial pull request.
Michael Adams shared a new version of lecture slides covering Clang libraries.
Krzysztof Parzyszek posted a Flang RFC for splitting composite OpenMP directives when lowering.
Joseph Faulls proposed extending LoopIdiomRecognizer to handle CRC routines.
Aart Bik provided an update on sparse tensor support on torch-mlir.
Reid Tatge is seeking land the previously discussed Machine Description Language in LLVM.
LLVM commits
A high level description and FAQ was committed for the in-progress debuginfo transition effort. 22da809.
Codegen for Arm64EC (“Emulation Compatible”) entry/exit thunks was implemented. a6065f0.
As part of the work to eliminate debug intrinsics, DPVAssign support was completed. Support was added to various passes and their creation was enabled. 30845e8, 5266543, d3a6a90. and more.
The SelectOptimize pass learned to handle some operations that behave like selects (e.g. some ORs). This is intended to fix some regressions from a recent change that converted some selects to or. a2d68b4.
The MachinePipeliner pass was modified to limit register pressure when scheduling. 7556626.
llvm.vp.minimum and llvm.vp.maximum intrinsics were introduced. 58cfd56.
v9.5-A definitions where added to the Arm backend, following similar patches for AArch64. 6bbaad1.
The LLVM IR atomics specification was adjusted to match memory model tweaks made in C++20. 8a45cec.
llvm-profdata can now filter functions from the profile using
--function
or--no-function
in include or exclude functions matching the regex. 2b8649f.The RISC-V backend gained support for the new relocation types needed by TLSDESC. 03a61d3.
New pass manager support was added to llc. 7e50f00.
Wasm GC types can now be parsed in type and table sections in Wasm object files. 7f409cd.
The developer policy was updated with some guidance on bans. 608d602.
The main branch LLVM version was bumped to 19.0.0git. 987087d.
Clang commits
APIs were exposed for PGO counter reset and file dumping. 4f21fb8.
Builtins.def was moved to a TableGen file. 4a58284.
Clang now applies syntax highlighting to the code snippets it prints. 718aac9.
The StandardCPlusPlusModules documentation was updated to match the status in Clang 18, and documentation was added on how to import modules in clang-repl. a31a600, bae1ada.
-fvisibility-global-new-delete
was introduced, giving control of how/if Clang forces visibility for the replacable new and delete declarations. 27ce26b.Code coverage documentation was updated to describe Modified Condition/Decision Coverage (MC/DC). 8789b7e.
__riscv_v_fixed_vlen
is now supported forvbool
types. c92ad41.The C++26 pack indexing feature (providing syntax for indexing packs of types of expressions) was implemented. ad1a65f.
A bugprone-chained-comparison clang-tidy check was introduced. 06c3c3b.
Other project commits
An ABI breaking change was made to
std::expected
, which was modified to ensure it has no tail padding. 4f46905.compiler-rt gained implementation of mem{cpy,set,move,chr} for AArch64 SME targets. 3112578.
SIGNAL and SLEEP intrinsics were added to flang. b64c26f, afa52de.
LLVM’s libc is now built with
-ftrivial-auto-var-init=pattern
by default. 1d5c16d.getauxval and limits.h were added to LLVM’s libc. 4beb723, 72ce629.
The libc GPU RPC documentation was updated. 03d362d.
Saturation arithmetic was implemented in libcxx. 03c19e9.
std::make_exception_ptr
was made around 30x faster. 51e91b6.The behaviour of throwing operator new under
-fno-exceptions
was made standards compliant. 3145265.RISC-V’s
R_RISCV_TLSDEC
relocation was implemented in LLD. 1117fdd.The arith-to-arm-sme conversion pass was added to MLIR. 9f7fff7.