LLVM Weekly - #483, April 3rd 2023
Welcome to the four hundred and eighty-third issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at http://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to asb@asbradbury.org, or @llvmweekly or @asbradbury on Twitter.
News and articles from around the web and events
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Kshitij Jain has an article on the LLVM blog about adding a new target/object backend to LLVM JITLink (in this case, 32-bit x86).
Early bird registration for EuroLLVM 2023 ends in one week’s time, on April 10th.
According to the LLVM calendar in the coming week there will be:
- Office hours with the following hosts: Paulo Matos, Tobias Grosser, Anastasia Stulova, Quentin Colombet, Johannes Doerfert.
- Online sync-ups on the following topics: Flang, SYCL, MemorySSA, OpenMP, loop optimisation, OpenMP for Flang, MLIR, HLSL, SPIR-V, GPU working group.
- For more details see the LLVM calendar, getting involved documentation on online sync ups and office hours.
On the forums
Katy Romanova polled for interest in an RFC on ‘distributed ThinLTO’ and then followed up with the RFC.
Nikola Tesic kicked off an RFC thread on reducing false positives from the debugify passes. The debugify passes are used to check how well another pass preserves debug information. The fundamental idea in this RFC is to add a flag which can be set when a
DebugLoc
is explicitly dropped and so shouldn’t be treated as a “loss”.Dmitry queried how stable the ld64.lld MachO linker is, which attracted multiple respondents indicating it should work as a drop-in for Apple’s linker.
Takumi Nakamura posted an RFC on generating the list of MachineValueTypes using TableGen.
Sameer Sahasrabuddhe posted an RFC on introducing convergence control intrinsics.
Aiden Grossman and Ondrej Sykora shared an RFC on memory annotations for llvm-exegesis. This aims to add support for setting up memory so as to allow an input basic block to run without crashing, thus enabling more snippets to be executed and benchmarked than is possible today.
There was further discussion about the overhead from threading in LLD by default with Fangrui Song noting that
--thread=8
often gives peak performance on x86_64. Mateusz Guzik argues this further supports the need for different defaults.Richard proposed that clang-tidy makes explicit the relationship between modules, checks, and check aliases. Piotr Zegar proposes in response that check aliases shouldn’t be treated as an additional check registration and e.g. shouldn’t be printed for
--list-checks
.
LLVM commits
Minimal block coverage instrumentation was implemented. This uses a boolean to determine if a basic block was executed or not, providing less precision than block count profiling but at lower overhead. 167e8f8.
A ConcurrentHashtable class was added to LLVM’s ADT library. 42058ee.
Initial specification of the PowerPC 64-bit ELFv2 calling convention was added in TableGen. 6126356.
Initial GlobalISel support for vector functions was added to the PPC backend. 3508f12.
The RISC-V backend now supports
.insn
with compressed instruction formats. 941667b.The RISC-V backend gained support (assembler/disassembler and codegen) for the experimental zicond extension. d3291c6, a755e80.
The WebAssembly DebugValueManager was redesigned. 5a55c95.
Iteration utilities are now documented in LLVM’s programmer’s manual. 8c40ad1.
A new
SelectionDAG::SplitScalar
helper was introduced. 8153b92.
Clang commits
Clang’s policies on claiming support for a feature were documented. ce548b6.
Remaining frontend support for PPC/Darwin was removed. 2fe49ea.
-fexperimental-assignment-tracking
now takes one of ‘enabled’, ‘disabled’, or ‘forced’. 41c92c0.The readability-operators-representation clang-tidy check was introduced. It enforces consistent choices for operators, e.g.
&&
,||
orand
,or
.
Other project commits
The Flang driver gained support for AMDGPU. e43247d.
compiler-rt’s shift builtins were updated to support architectures with 16-bit int. 3834b04.
A patch working towards support for big-endian Arm targets in LLD was committed. 2f68ddc.
MLIR gained utilities for 1:n type conversions. 0ceb7a1, 4e56361.
LLVM’s OpenMP library now supports asynchronous memory copy. 4753a4e.