LLVM Weekly - #467, December 12th 2022
Welcome to the four hundred and sixty-seventh issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at http://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to asb@asbradbury.org, or @llvmweekly or @asbradbury on Twitter.
News and articles from around the web and events
Videos have started to be published on YouTube from the 2022 LLVM Developers' Meeting.
According to the LLVM calendar in the coming week there will be:
- Office hours with the following hosts: Alexey Bader, Alina Sbirlea, Kristof Beyls, Johannes Doerfert, Michal Paszkowski, BOLT developer(s) (sorry, it’s not clear from the calendar event!).
- Online sync-ups on the following topics: Flang, SYCL, OpenMP, loop optimisation, MLIR, and SPIR-V.
- For more details see the LLVM calendar, getting involved documentation on online sync ups and office hours.
On the forums
Aaron Ballman shared some detailed thoughts on the LLVM review process, the role of code owners, the issue of slow reviews, and more.
Renato Golin proposed aggregating builders and thus removing the dependence on a single Buildbot buildmaster.
Nick Desaulniers posted a RFC on handling outputs along indirect edges of callbr and summarised feedback so far.
Yin Zhang shared an RFC on adding an
std::experimental::simdimplementation to libcxx.Sean Silva shared thoughts on PyTorch 2.0 from the perspective of Torch-MLIR.
Hans W kicked off a discussion about the idea of an ‘ABI sanitizer’.
LLVM commits
AMDGPU’s LDS (local data store) lowering was reimplemented. d77ae7f.
Many tests were ported to the
-passes=syntax. Tests using the old syntax must now use-temporarily-allow-old-pass-syntax. e536982, a40d5e3 (and lots more), b1a9584.A new
exec-on-ir-change=option was added that calls the given executable each time the IR changes. 4555304.Support for named sub-operands in TableGen was extended, and used to simplify the SPARC instruction decoder. 372240d, 0990019.
.cfi_def_cfa_expressionis now generated for RISC-V vector stack adjustment. 132dc44.Support was implemented on AArch64 for
__arm_rsr128and__arm_wsr128, used for reading/writing 128-bit system registers. 83b3304.Codegen support was committed for the Zfhmin RISC-V extension. 7b50c18.
Reassociation logic in the MachineCombiner was extended to handle inverse instructions. f8ed709.
A new
G_INVOKE_REGION_STARTGlobalISel instruction was added. 53445f5.The AArch64 backend gained MC layer support for the v8.9-A/v9.4-A base extensions. 2050e7e.
A
!listremove()operator was added to TableGen. d576537.A new assignment tracking analysis pass was added. 1d1de74.
The opaque pointers documentation was updated with the current transition status. c31ef75.
Clang commits
Initial support for
-Wunsafe-buffer-usage(warnings for use of raw buffer pointers) started to land. 3b7af27.A new Clang driver option was added to emit header usage information to a file in JSON format. 3738ce0.
In C2x mode, the requirements for
va_startwere relaxed. e321c53.clang-doc gained template support. 4a68bab.
A new clang-tidy check was added to check for redundant calls of
empty()on a container where the result of the call is ignored. ec3f8fe.