LLVM Weekly - #325, Mar 23rd 2020

Welcome to the three hundred and twenty-fifth issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at https://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to asb@asbradbury.org, or @llvmweekly or @asbradbury on Twitter.

News and articles from around the web

LLVM 10.0.0-rc6 has been tagged.

On the mailing lists

• The 3rd MLIR newsletter is now out.

• ORC JIT Weekly #9 is out. OrcV2 JITEventListener support (with fixes) has landed.

• Anton Korobeynikov has sent a note out for students thinking of submitting proposals for LLVM in GSoC.

• Rahman Lavaee shared a plan for handling Intel JCC mitigation using Propeller.

• Farzad Sadeghi posted an RFC on adding his cgrep utility to clang-tools-extra.

• Kristóf Umann has shared a patch implementing reaching definitions calculation for C++ and is seeking feedback.

• Ties Stuij proposes adding a new bfloat IR type for the C bfloat16 format in Armv8.6-a. Respondents discussed whether an IR type was necessary.

• Evandro Menezes shared a draft proposal for a compact code model for RISC-V.

LLVM commits

• The register data flow (RDF) framework was moved from the Hexagon backend to the shared CodeGen library, to enable it to be used by other targets. 080dd10.

• Known bits constant folding was removed on the basis that it is incredibly expensive but almost never has an impact on generated code. As a further follow-up, the ExpensiveCombines option was removed altogether. 2b52e4e, dc81923.

• Lit gained support for flaky tests through the ALLOW_RETRIES keyword. f951b0f.

• Documentation was added to explain loop rotation. 7fa2045.

• The second in a series of patches to enable basic block sections (one BB per ELF section) was committed. df082ac.

• Arm learned to spill extra registers when compiling for -Oz in cases where inter-procedural register allocation may benefit from this. 73cea83.

• The RISC-V backend gained improved codegen for materialising +0.0 floating point immediates. 3c24aee.

Clang commits

• A tablegen backend was added to generated builtins and a header for SVE. 8b409ea.

• Support was added for the -mdouble=x flag to set the width of double types for AVR. 4add249.

• clang-format can now handle C# generic type constraints. dcbcec4.

• The Clang driver now accepts and -msmall-data-limit argument for RISC-V, which will put global and static data smaller than the limit into a special section. fc37526.

Other project commits

• libc gained implementations of memcpy, sigaction, and signal. 04a309d, 4d35055, ca04d0c.

• libc now has a range of Arm optimised routines. 0928368.

• MLIR gained support for out of tree projects embedding it using CMake. 7ca473a.