LLVM Weekly - #306, November 11th 2019
Welcome to the three hundred and sixth issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at https://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to asb@asbradbury.org, or @llvmweekly or @asbradbury on Twitter.
As many of you know, I co-founded a not-for-profit collaborative engineering company, lowRISC. We've had a huge announcement last week, publicly announcing the world's first open source silicon root of trust - OpenTitan.
News and articles from around the web
The call for papers for the 4th LLVM performance workshop at CGO has been posted. The deadline for submissions in teh 5th Jan, and the workshop will take place on Feb 23rd in San Diego.
Herb Sutter has posted a trip report from the Autumn ISO C++ standard meeting.
On the mailing lists
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Mehdi Amini started a thread on allowing LLVM contributions through GitHub pull requests. This generated a huge amount of discussion, pro and con.
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Levi Aul is seeking feedback on supporting an unlimited width integer type. David Chisnall provided some thoughts.
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Ehud Katz posted an RFC on exposing the waymarking algorithm from the 'Use' class as an independent utility.
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Bardia Mahjour sent out the loop optimisation working group meeting minutes for last week.
LLVM commits
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The 'freeze' instruction was added to LLM IR, which can be used to stop propagation of undef and poison values. 58acbce, 2d21068.
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GlobalISel saw a number of documentation improvements including docs on KnownBits analysis, debugging with the block extractor, and GMIR and GenericOpCode references. 312932a, 7060840, ad0dfb0.
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SystemZ gained support for the GHC calling convention. 22f9429.
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DFAPacketizer was updated to allow up to 64 functional units. 39525a6.
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DWARFDebugLocLists started to moved to an incremental parsing model. e1f8c8a.
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InstCombine will now canonicalise shift+logic+shift to reduce the dependency chain. d9ccb63.
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The
-consider-local-interval-cost
options for the greedy register allocator is now enabled by default for AArch64. This has very minor impact which the commit message documents. f649f24. -
Development of the data dependency graph continues with the addition of Pi Blocks. f0af11d8.
Clang commits
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Syntax nodes were added for most comment statements. 58fa50f.
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Clang's sysroot computation will now do a better job for the RISC-V target in the case that no GCC install is detected. de61aa3.