LLVM Weekly - #202, Nov 13th 2017

Welcome to the two hundred and second issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at https://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to asb@asbradbury.org, or @llvmweekly or @asbradbury on Twitter.

News and articles from around the web

Trip reports have started to appear from the ISO C++ standards meeting in Albuquerque. Check out Herb Sutter's writeup and the Reddit trip report written by Bryce Lelbach and other commmittee members.

It looks like all the videos from the 2017 LLVM Dev Meeting have now been posted.

On the mailing lists

• Amara Emerson has posted an RFC on the design of a generic machine instruction combiner/optimizer framework, which would be used as part of the GlobalISel pipeline.

• Quentim Colombet has revived the discussion in enabling GlobalISel for AArch64 at O0 by default.

• Chandler Carruth has summed up the options for dealing with function names that are treated specially by LLVM (libc/libm function names primarily).

• Krzysztof Parzyszek has written a really useful post explaining the two forms of implicit defs in LLVM.

• Vedant Kumar proposed an RFC on improvements to IRBuilder that provide a better interface for clients to "do the right thing" when it comes to setting debug locations.

• Rui Ueyama proposed dropping TLS relaxations in LLD in favour of TLSDESC. A number of people explained how TLS relaxations are important to their use cases, meaning this change is very unlikely to happen. As Rui explains, floating these ideas and getting feedback is an important part of the LLD design and development process.

• Alexey Bataev wrote an RFC on improving debug info support for Cuda/NVPTX.

• Nuno Lopes is looking for confirmation of whether it's ever valid for LLVM IR to allocate more than half the address space.

LLVM commits

• GlobalISel learned to legalize non-power-of-2 sized types. r317560.

• The set of fast-math flags have been updated and expanded. See the commit message for full details. r317488.

• llvm-opt-fuzzer was introduced to allow fuzzing of optimisation passes. The interface is similar to llvm-isel-fuzzer. r317883.

• A cross-compilation toolchain configuration has been added for using clang-cl on non-Windows hosts to target MSVC. r317830.

• All TargetOpcode::* instructions now have properties set explicitly, meaning you can freely use guessInstructionProperties=0 in your backend to opt-out of property inference. This change made it obvious what hasSideEffects was being inferred as '1' in unexpected cases, e.g. PHI. This has now been corrected, and patches are in review that fix hasSideEffects for other instructions. r317674, r317721.

• The xray-converter tool can now convert XRay traces to Chrome's Trace Event Format. r317531.

• Documentation has been added on cross-compiling and testing the compiler-rt builtins for Arm targets with QEMU. r317554.

• FileCheck now supports a -D flag which can be used to define variables used in CHECK lines. r317572.

• MC layer support for AArch64 SVE has started to land. r317590, r317591.

• Target/TargetInstrInfo.h moved to CodeGen/TargetInstrInfo.h. r317647.

• A number of additional RISC-V backend patches have finally landed. Codegen support for memory operations, conditional branches, and function calls. Please help review some of my remaining patches. r317685, r317690, r317691.

• The llvm.sideeffect intrinsic has been introduced. This intrinsic prevents optimisations passes from optimising away any loops that contain it. r317729.

• The AMDGPU backend gained a number of new optimisations. r317750, r317751, r317752, and more.

Clang commits

• The _Float16 and __fp16 types have been documented. r317558.

• The redundant expression checker can now detect redundant expressions that contain macros. r317570.

Other project commits

• The LLVM test suite now includes the HACCKernels (Hardware/Hybrid Accelerated Cosmology Code) benchmark. r317483.

• ubsan-minimal no longer depends on libc++. r317969.

• The NativeRegisterContext class in LLDB has seen some minor refactoring, which is likely to lead to changes if you have out of tree platform plugins. r317881.

Review corner

The LLVM Weekly review corner serves to highlight patches that are stuck waiting awaiting review, or work from first-time contributors. See here for more information and how to submit you work for inclusion. Of course the hope is that highlighting these patches will enable LLVM Weekly readers will step up and help to get them merged. I'll be reporting back each week on any activity generated on these patches, as well as sharing a new batch. If you want your patch included you must submit it via the linked form.

We had one patch submission last week and it did attract new review activity thanks to David Li.

There were two new review corner submissions this week:

• This patch helps the inline cost model to find repeated loads in the callee that are clobbered by the stores which are going to be removed after inlining. It improves the accuracy of inline cost model and improves performance. D33946, patch by Haicheng Wu.

• "By just reordering Values.def, one can get a clang binary that's 400k smaller without any performance change, just by favoring isa<Constant> over isa<Argument>". D39373, patch by Serge Guelton.